Analog Inputs - ADS1115¶

Overview¶

The ADS1115 is a 4-channel, 16-bit ADC used to measure Battery Voltage (AIN0), Alternator Current (AIN1), Engine Speed (AIN2), and optional analog Temperature (AIN3). Each channel uses a TLV9154 op-amp configured as a unity-gain buffer so that high-impedance sources can be measured accurately by the ADC. The analog front end is capable in a noisy environment and includes input protection, output isolation, and local decoupling.

Design Considerations¶

Op-Amp Buffering¶

The voltage dividers and analog sources feeding the ADS1115 are intentionally high impedance in order to minimize current draw. The ADS1115 input uses an internal switched-capacitor structure and multiplexer — a direct connection from a high-impedance source can introduce loading error, settling error, and channel-to-channel interaction. The TLV9154 is used as a unity-gain buffer to isolate the source from the ADC input.

Near 0 V on a single 3.3 V supply, offset, noise, and output swing limits mean signals very close to 0 V should not be treated as ideal. This is not practically relevant for Battery Voltage or Alternator Current. It may matter at very low RPM or in certain temperature sensor configurations, but not likely.

ADS1115 Input Range¶

The ADS1115 runs from a single 3.3 V supply. All input signals must remain within approximately 0 V to 3.3 V. The design is treated as a single-supply, ground-referenced measurement system. Negative input voltages are not intended to be measured. Divider ratios and signal conditioning are chosen accordingly.

System Architecture¶

Signal Chain¶

All channels follow the same general structure:

Input Signal ──[R1]──┬──[R2 or DNP]──GND
                     │
                  [4.7kΩ]
                     │
               TLV9154 IN+
                     │
              TLV9154 OUT ────┬──── TLV9154 IN−
                              │
                           [330Ω]
                              │
                       ADS1115 AINx
                              │
                          [0.33µF]
                              │
                             GND

The 4.7 kΩ resistor is in series with the non-inverting input and provides fault-current limiting.
The TLV9154 is configured as a unity-gain buffer by tying OUT directly to IN−.
The 330 Ω output resistor must remain outside the feedback loop.
The 0.33 µF capacitor is placed on the ADS1115 side of the 330 Ω resistor.

Output Filter¶

Every channel uses the same RC filter between the TLV9154 output and the ADS1115 input: a 330 Ω series resistor followed by a 0.33 µF capacitor to ground. This gives a cutoff frequency of approximately 1.46 kHz and a time constant of 109 µs. There is no filtering before the op-amp on any channel.

ADC Resolution¶

Supply: 3.3 V
LSB resolution: 0.1 mV (3.3 V ÷ 32768 counts)
Practical accuracy: limited by resistor tolerance, op-amp offset, noise, and layout

Channel 0: Battery Voltage Monitor¶

Application: Battery voltage monitoring for 12 V, 24 V, and 48 V systems.

Components¶

Designator	Value	Part Number	Package	Tolerance
R1 (top)	1 MΩ	1MRTT021004BTH	0402	±0.1%
R2 (bottom)	49.9 kΩ	RT0402BRE0749K9L	0402	±0.1%

Divider Parameters¶

Divider ratio: 49.9k / (1000k + 49.9k) = 0.04753
Maximum measurable voltage: 3.3 V ÷ 0.04753 = 69.4 V
Engineering resolution: 0.1 mV ÷ 0.04753 = 2.1 mV per LSB at the input
Thevenin resistance: (1000k × 49.9k) / (1000k + 49.9k) ≈ 47.6 kΩ

Performance¶

Input Voltage	Divided Voltage	ADC Reading	Practical Accuracy
12.0 V	0.570 V	Valid	0.46%
24.0 V	1.141 V	Valid	0.23%
48.0 V	2.281 V	Valid	0.11%
60.0 V	2.852 V	Valid	0.092%
69.4 V	3.300 V	Valid (max)	—

Power Consumption¶

Input Voltage	Divider Current	Divider Power
12.0 V	11.4 µA	0.14 mW
24.0 V	22.9 µA	0.55 mW
48.0 V	45.7 µA	2.19 mW
60.0 V	57.1 µA	3.43 mW

Channel 1: Alternator Current Monitor¶

Application: QNHC1K-21 200 A Hall Effect Current Sensor (2.5 V @ 0 A, ±2 V swing for ±200 A).

Components¶

Designator	Value	Part Number	Package	Tolerance
R1 (top)	300 kΩ	ERA3AEB304V (Panasonic)	0603	±0.1%
R2 (bottom)	300 kΩ	ERA3AEB304V (Panasonic)	0603	±0.1%

Divider Parameters¶

Divider ratio: 300k / (300k + 300k) = 0.5000 exactly
Thevenin resistance: 150 kΩ
Sensor voltage range: 0.5 V (−200 A) to 4.5 V (+200 A)
ADC voltage range: 0.25 V to 2.25 V

Performance¶

Hall Sensor Voltage	Current	Divided Voltage	ADC Reading
0.5 V	−200 A	0.250 V	Valid
2.5 V	0 A	1.250 V	Valid
4.5 V	+200 A	2.250 V	Valid

Sensor scaling: 100 A/V at the sensor → 50 A/V after the 2:1 divider (for the 200 A sensor). The firmware supports three ratings — AmpSensorRange 0/1/2 selects 200/300/500 A sensors with 100/150/250 A/V respectively at the sensor; same divider in all cases
Theoretical current resolution: 0.02 A per LSB at 200 A range
Practical accuracy: approximately ±1 A, limited by sensor drift, noise, and EMI

Power Consumption¶

Input Voltage	Divider Current	Divider Power
2.5 V (0 A)	4.17 µA	10.4 µW
4.5 V (+200 A)	7.50 µA	33.8 µW

Channel 2: Engine Speed Monitor¶

Application: LM2907 frequency-to-voltage converter output from alternator stator tap

Design Parameters¶

Source interface: LM2907 output to TLV9154 input through the standard 4.7 kΩ input protection resistor
Filter capacitor: 5 nF ±10%, X7R, 0603 SMD
LM2907 output range: 0 V to 5 V
Op-amp output range: 0 V to 3.3 V (clipped by supply rail)
ADC voltage range: 0 V to 3.3 V
Minimum measurable: 0.01 V LM2907 output (8 Hz minimum frequency)
Maximum measurable: 3.3 V LM2907 output (2640 Hz maximum frequency)

LM2907 Circuit Configuration¶

Power & Bypass - Pin 6 (V+): 5 V supply - Pin 5 (COL): 5 V supply - Pin 8 (GND): System ground - Bypass capacitor: 1 µF from Pin 6 to ground

Timing Components (Frequency-to-Voltage Conversion) - Pin 2 (CP1): 10 nF capacitor to ground - Pin 3 (CP2/IN+): - Three 1 µF capacitors to ground (total 3 µF) - 25 kΩ resistor to ground - Transfer function: VO = VCC × fIN × C1 × R1 = 5 V × fIN × 10 nF × 25 kΩ - Scaling factor: VO = fIN × 0.00125 V/Hz

Output Configuration - Pin 4 (EMIT): Connected to Pin 7 and 10 kΩ pull-down, feeds the op-amp input through 4.7 kΩ - Pin 7 (IN−): Connected to Pin 4 (feedback)

Input Signal Conditioning (Pin 1 – TACH+) - AC coupling: Two 10 µF/100 V capacitors in parallel (20 µF total) - Series resistance: 4.7 kΩ, 2 W (HP122WJ0472T4E) - Input filtering: 6.8 nF capacitor to ground - Input termination: 100 kΩ resistor to ground - Overvoltage protection: SMBJ12CA bidirectional TVS diode (12 V clamp)

Input Signal Conditioning - Detailed Analysis¶

The LM2907 input circuit is an AC-coupled, attenuated input with complex frequency-dependent behavior. Proper analysis requires treating this as an AC circuit with both capacitive reactances and resistive elements.

Circuit Topology:

Stator Signal → 4.7kΩ series → 20µF coupling → LM2907 Pin 1
                                                    ↓
                                            (100kΩ || 6.8nF) to GND
                                                    ↓
                                              SMBJ12CA TVS

High-Pass Filter Characteristics: - Time constant: τ = R_bias × C_coupling = 100 kΩ × 20 µF = 2.0 seconds - Corner frequency: f_c = 1/(2πτ) = 1/(2π × 100 kΩ × 20 µF) = 0.08 Hz - Purpose: Blocks DC offset, allows AC signal to pass

Complex Impedance Analysis at Operating Frequencies:

At typical alternator frequency (60 Hz): - Coupling capacitor reactance: X_c(20 µF) = 1/(2π × 60 Hz × 20 µF) ≈ 133 Ω - Shunt capacitor reactance: X_c(6.8 nF) = 1/(2π × 60 Hz × 6.8 nF) ≈ 389 kΩ

Parallel Load Impedance (100 kΩ || 6.8 nF at 60 Hz):

Z_parallel = (R_bias × Z_shunt) / (R_bias + Z_shunt)
Z_parallel = (100kΩ × (-j389kΩ)) / (100kΩ - j389kΩ)
|Z_parallel| ≈ 96.9kΩ at ∠-14.4°

Total Circuit Impedance:

Z_total = R_series + Z_coupling + Z_parallel
Z_total = 4.7kΩ + (-j133Ω) + (93.8kΩ - j24.1kΩ)
|Z_total| ≈ 101.5kΩ

Frequency-Dependent Transfer Function:

The combined transfer function includes both high-pass coupling and voltage division:

H(f) = H_coupling(f) × H_divider(f)

where:
H_coupling(f) = [j2πf × τ] / [1 + j2πf × τ]  (high-pass from AC coupling)
H_divider(f) = Z_load(f) / [Z_series + Z_coupling(f) + Z_load(f)]

Signal Attenuation vs. Frequency:

Frequency	X_c(20µF)	X_c(6.8nF)	Coupling Gain	Divider Gain	Total Gain	Attenuation	Required Input*
5 Hz	1592 Ω	4.68 MΩ	0.628	0.955	0.600	40%	41.7 mVpp
10 Hz	796 Ω	2.34 MΩ	0.783	0.955	0.748	25%	33.4 mVpp
50 Hz	159 Ω	468 kΩ	0.950	0.955	0.907	9.3%	27.6 mVpp
60 Hz	133 Ω	389 kΩ	0.958	0.955	0.915	8.5%	27.3 mVpp
100 Hz	80 Ω	234 kΩ	0.975	0.955	0.931	6.9%	26.8 mVpp
1000 Hz	8 Ω	23.4 kΩ	0.998	0.955	0.953	4.7%	26.2 mVpp
2000 Hz	4 Ω	11.7 kΩ	0.999	0.955	0.954	4.6%	26.2 mVpp

* Required stator amplitude to produce 25 mVpp at LM2907 Pin 1 (minimum detection threshold)

Key Observations: 1. At high frequencies (>100 Hz): Coupling capacitor has minimal impedance, attenuation approaches resistive divider limit (~4.7%) 2. At mid frequencies (50–100 Hz): Combined attenuation ~7–9% due to coupling capacitor reactance 3. At low frequencies (<10 Hz): Significant high-pass attenuation, requires much stronger input signals 4. Shunt capacitor (6.8 nF): Negligible effect below 1 kHz, provides high-frequency noise filtering

TVS Clamping Analysis:

The SMBJ12CA TVS begins conducting when node voltage exceeds approximately 13 V. Node peak voltage depends on input amplitude and frequency:

Input Amplitude	Node Peak @ 60 Hz	TVS Status	Impact
12 V pp	5.73 V	No clamp	Normal operation
24 V pp	11.46 V	No clamp	Normal operation
48 V pp	22.91 V	Clamps	Limits peaks, reduces power
60 V pp	28.64 V	Clamps	Heavy clamping, significant power

At 48 V pp and above, TVS clamping occurs during signal peaks, providing overvoltage protection and reducing actual power dissipation below calculated linear values.

LM2907 Recovery Time After Field Dropout¶

Problem Description: When the alternator field is cut off (load dump protection or shutdown), the RPM reading drops to zero and takes 5–10 seconds to recover even though actual zero-crossing loss is only ~300 ms. This is caused by the AC coupling capacitor charge retention.

Coupling Capacitor Discharge Mechanism:

When a large signal is present, the 20 µF coupling capacitor charges to a DC level corresponding to the signal amplitude. When the signal suddenly drops (field cutoff), this stored charge must discharge through the 100 kΩ bias resistor before the LM2907 can detect the restored signal.

Exponential Decay:

V_offset(t) = V_initial × e^(-t/τ)

where τ = R_bias × C_coupling = 100kΩ × 20µF = 2.0 seconds

Recovery Time to Detection Threshold:

The LM2907 requires approximately 25 mVpp at Pin 1 for reliable frequency detection. Recovery is defined as the time until the residual DC offset has decayed enough for the restored signal to exceed this threshold.

Recovery fraction α = 1 - (V_threshold / V_initial)
t_recovery = -τ × ln(1 - α)

Recovery Timing:

Recovery Level	Time Factor	Recovery Time	Practical Meaning
63% recovered	1.0τ	2.0 seconds	One time constant
90% recovered	2.3τ	4.6 seconds	Practical recovery
95% recovered	3.0τ	6.0 seconds	Near-complete
99% recovered	4.6τ	9.2 seconds	Essentially complete

Observed Behavior: - Field dropout creates 5–10 second RPM reading gap - Actual zero-crossing signal loss is only ~300 ms - Remaining 4.6–9.2 seconds is coupling capacitor discharge time - This matches the exponential recovery prediction of 2.3τ to 4.6τ

Why Component Values Were Not Changed:

An alternative bias resistor value of 10 kΩ would reduce the time constant to 0.2 seconds (recovery time ~0.46 seconds), eliminating the dropout problem. However, testing revealed that fixing one problem caused another, and a better balance could not be found.

Speculation: The lower bias resistance (10 kΩ) likely created issues with: - Reduced signal sensitivity (40% gain reduction requiring stronger input signals) - Potential high-frequency instability or noise pickup with lower impedance node - Changed signal-to-noise ratio affecting detection reliability at idle speeds - TVS clamping occurring at lower input voltages (16 V peak at 48 V pp input vs 23 V with 100 kΩ)

Solution - Software Field Management:

Rather than compromise the hardware circuit balance, the recovery time issue is addressed in software by maintaining a small alternator field current at all times. This field current is sufficient to generate a detectable stator signal for RPM measurement but small enough that no charging occurs (effectively "off" from a charging perspective). This ensures continuous RPM readings without the 5–10 second dropout after field transitions.

Power Dissipation Analysis¶

AC Operation (Normal Conditions):

Under normal AC operation, power dissipation must be calculated using complex impedance analysis with RMS voltage and current values.

At 12 V Peak-to-Peak (4.24 V RMS, 60 Hz):

|Z_total| = 101.5kΩ
I_rms = 4.24V / 101.5kΩ = 41.8µA
P_series = (41.8µA)² × 4.7kΩ = 0.008mW
P_bias = |V_node_rms|² / R_bias = 0.16mW
P_total = 0.17mW

At 24 V Peak-to-Peak (8.49 V RMS, 60 Hz):

I_rms ≈ 0.106mA
P_series = (0.106mA)² × 4.7kΩ = 0.053mW
P_bias = 0.71mW
P_total = 0.76mW

At 48 V Peak-to-Peak (16.97 V RMS, 60 Hz) - TVS Clamping Occurs:

Without TVS: I_rms ≈ 0.21mA, P_bias would be ~2.9mW
With TVS clamping: Node voltage limited to ~13V peaks
Actual P_bias ≈ 2-3mW (reduced by clamping)
P_series ≈ 0.2mW

Summary - AC Power Dissipation:

Input Amplitude	Frequency	Bias R Power	Series R Power	Total	TVS Status
12 V pp (4.24 V RMS)	60 Hz	0.16 mW	0.008 mW	0.17 mW	No clamp
24 V pp (8.49 V RMS)	60 Hz	0.71 mW	0.053 mW	0.76 mW	No clamp
48 V pp (16.97 V RMS)	60 Hz	~2–3 mW*	0.2 mW	~2.2–3.2 mW	Clamps
60 V pp (21.21 V RMS)	60 Hz	~3–4 mW*	0.3 mW	~3.3–4.3 mW	Clamps

* TVS clamping reduces power dissipation below linear calculation

DC Fault Conditions (Engine-Off with Rectifier Leakage):

If DC voltage appears on the stator tap (fault condition), the coupling capacitor will charge to the input voltage and steady-state DC current flows through the bias resistor:

Steady-State DC Analysis (After Capacitor Charged):

I_dc = V_input / R_bias
P_bias = V_input² / R_bias
P_series ≈ 0 (no current through series resistor after capacitor charges)

DC Input	Steady-State Current	Bias Resistor Power	Status
12 V	120 µA	1.44 mW	Negligible
14 V	140 µA	1.96 mW	Safe
24 V	240 µA	5.76 mW	Safe
48 V	480 µA	23.0 mW	Safe

Transient DC Fault (Before Capacitor Charges):

During the initial moment of a DC fault before the coupling capacitor charges, current flows through both resistors in series. The TVS provides protection:

I_transient = V_input / (R_series + R_bias)
            = V_input / 104.7kΩ (if TVS doesn't clamp)

DC Input	Maximum Transient I	Series R Power	TVS Protection	Status
14 V	134 µA	0.08 mW	No clamp needed	✅ Safe
28 V	267 µA	0.33 mW	No clamp needed	✅ Safe
56 V	535 µA	1.34 mW	TVS clamps	✅ Safe

Component Ratings: - 4.7 kΩ series resistor: HP122WJ0472T4E rated at 2 W — massive safety margin - 100 kΩ bias resistor: 0.1 W rated — adequate for all operating conditions - Maximum power in bias resistor: ~23 mW at 48 V DC fault (4.3× safety margin) - Normal AC operation: <1 mW in bias resistor under typical conditions

Normal AC Operation (3 V to 58 V inputs)¶

No damage risk: AC signals don't cause sustained power dissipation above safe limits
TVS clipping: Signals above ~48 V pp get peak-clamped to ~13 V by SMBJ12CA, maintaining proper LM2907 operation while protecting the circuit
Circuit robustness: Safe operation with input signals from 3 V to 58 V+ amplitude

Filter Characteristics (LM2907-to-TLV9154 Interface)¶

The LM2907 channel does not use the same front-end voltage divider as the battery and current channels, but it still uses the same protected TLV9154-to-ADS1115 interface: - 4.7 kΩ series resistor into the op-amp non-inverting input - Direct output-to-inverting-input feedback - 330 Ω output isolation resistor - 0.33 µF capacitor at the ADS1115 input node

Frequency and RPM Analysis¶

Engine-to-Stator Scaling Factors: - Conservative case: 6-pulse alternator, 1.5:1 belt ratio → Engine RPM × 0.15 = Stator Hz - Aggressive case: 7-pulse alternator, 2.5:1 belt ratio → Engine RPM × 0.292 = Stator Hz - Worst case: 1-pulse per revolution, 1:1 direct → Engine RPM × 0.0167 = Stator Hz

Performance Analysis (Conservative Case Example)¶

Minimum detectable frequency: 8 Hz Maximum detectable frequency: 2640 Hz (limited by 3.3 V op-amp supply rail)

Engine RPM	Stator Frequency	LM2907 Output	ADC Voltage	Status
53 RPM	8 Hz	0.010 V	0.010 V	Minimum detectable
133 RPM	20 Hz	0.025 V	0.025 V	Valid
300 RPM	45 Hz	0.056 V	0.056 V	Valid
600 RPM	90 Hz	0.113 V	0.113 V	Valid
1500 RPM	225 Hz	0.281 V	0.281 V	Valid
3000 RPM	450 Hz	0.563 V	0.563 V	Valid
4000 RPM	600 Hz	0.750 V	0.750 V	Valid
6000 RPM	900 Hz	1.125 V	1.125 V	Valid
8000 RPM	1200 Hz	1.500 V	1.500 V	Valid
10667 RPM	1600 Hz	2.000 V	2.000 V	Valid
14667 RPM	2200 Hz	2.750 V	2.750 V	Valid
17600 RPM	2640 Hz	3.300 V	3.300 V	Maximum detectable

RPM Range Summary: - Conservative (6-pulse, 1.5:1): 53 RPM to 17,600 RPM - Aggressive (7-pulse, 2.5:1): 27 RPM to 9,041 RPM - 1-pulse direct: 479 RPM to 158,400 RPM

Input Signal Requirements¶

Minimum detectable signal: ~25 mVpp at Pin 1 after attenuation (LM2907 worst-case threshold per datasheet interpretation)

Required Stator Signal vs. Frequency:

Due to high-pass filter attenuation at low frequencies, the required stator amplitude varies with frequency:

Frequency	Required Stator	Signal at Pin 1	High-Pass Loss	Detection Status	Engine RPM (Conserv.)
5 Hz	41.7 mVpp	25 mVpp	40%	Marginal	33 RPM
10 Hz	33.4 mVpp	25 mVpp	25%	✅ Good	67 RPM
20 Hz	28.0 mVpp	25 mVpp	11%	✅ Good	133 RPM
50 Hz	27.6 mVpp	25 mVpp	9.3%	✅ Good	333 RPM
100 Hz	26.8 mVpp	25 mVpp	6.9%	✅ Excellent	667 RPM
500 Hz	26.3 mVpp	25 mVpp	5.0%	✅ Excellent	3333 RPM
1000 Hz	26.2 mVpp	25 mVpp	4.7%	✅ Excellent	6667 RPM

Frequency Response Impact: - Above 100 Hz: Minimal attenuation (~5–7%), excellent sensitivity - 50–100 Hz: Moderate attenuation (~7–9%), good sensitivity - 10–50 Hz: Increasing attenuation (10–25%), requires stronger signals - Below 10 Hz: Significant attenuation (>25%), marginal detection

This explains why very low RPM detection depends on stator signal strength — the high-pass filter causes 2× signal requirement at 5 Hz compared to 100 Hz.

Input signal analysis for 100 mVpp stator input:

Frequency	Signal at Pin 1	Detection	Engine RPM (Conservative)	Engine RPM (1-pulse)
50 Hz	90.7 mVpp	✅ Excellent	333 RPM	3000 RPM
100 Hz	93.1 mVpp	✅ Excellent	667 RPM	6000 RPM
500 Hz	95.3 mVpp	✅ Excellent	3333 RPM	30000 RPM
800 Hz	95.4 mVpp	✅ Excellent	5333 RPM	48000 RPM
1000 Hz	95.3 mVpp	✅ Excellent	6667 RPM	60000 RPM

Very Low Frequency Analysis (1-pulse systems):

Minimum detectable: 8 Hz = 479 RPM for 1-pulse systems

Engine RPM	Frequency	Required Stator	Signal at Pin 1	Detection Status
479 RPM	8 Hz	~50 mVpp	25 mVpp	Minimum detectable
1500 RPM	25 Hz	28.8 mVpp	25 mVpp	✅ Good if signal present
3000 RPM	50 Hz	27.6 mVpp	25 mVpp	✅ Good
6000 RPM	100 Hz	26.8 mVpp	25 mVpp	✅ Excellent
18000 RPM	300 Hz	26.3 mVpp	25 mVpp	✅ Excellent
30000 RPM	500 Hz	26.3 mVpp	25 mVpp	✅ Excellent
60000 RPM	1000 Hz	26.2 mVpp	25 mVpp	✅ Excellent
95040 RPM	1584 Hz	26.2 mVpp	25 mVpp	✅ Excellent
158400 RPM	2640 Hz	26.2 mVpp	25 mVpp	Maximum detectable

Sine vs. Square Wave Performance: Both waveform types perform identically for frequency detection. The LM2907 detects zero crossings regardless of waveform shape, and AC coupling affects both equally at very low frequencies.

Floating Stator Reference Note: The alternator stator (three-lead wye configuration) is electrically floating with respect to chassis ground and battery negative. The stator neutral is not tied to ground or B+, and individual phase voltages are defined phase-to-neutral, not phase-to-ground.

When a stator phase is measured relative to chassis ground, the observed waveform and peak voltage are influenced by internal rectifier diode steering and system voltage, and do not represent the true phase amplitude. Apparent "clamping" near battery voltage during grounded measurements is a measurement artifact, not a hard electrical limit of the stator.

Input conditioning for RPM measurement therefore assumes: - Potentially large common-mode voltage relative to ground - AC waveform with floating reference - Protection and level-limiting must be defined relative to the measurement circuit ground, not alternator ground

The RPM input conditioning (series resistance + bidirectional TVS + AC coupling) is designed to safely handle this floating stator behavior without relying on any assumed ground reference.

High-Voltage Input Robustness: If an extreme-case stator waveform reaches ~120 V peak relative to system ground, the LM2907 input remains protected by the 4.7 kΩ series resistor + SMBJ12CA bidirectional TVS. The series resistor limits peak clamp current to ~20–25 mA, and the TVS clamps the LM2907 input node to approximately ±15 V, well below the ±28 V absolute maximum rating of the grounded-input LM2907. Even under continuous sinusoidal excitation, average TVS dissipation remains well below 0.5 W, within safe thermal limits for the SMBJ package with normal PCB copper. Result: no overvoltage risk to the LM2907, even for large floating stator voltages.

Channel 3: Optional Analog Temperature Input¶

Application: Engine or alternator temperature monitoring using a 10 kΩ NTC thermistor or TMP235A4DCKR analog temperature sensor. For most users, the preferred temperature measurement method is a digital OneWire sensor. Channel 3 is therefore optional and ships as a ground by default.

Components¶

Designator	Value	Part Number	Package	Notes
Ground jumper	0 Ω	1206W4F0000T5E	1206	Before the divider; shorts AIN3 to GND when channel not needed
R1 (top)	0 Ω	0603WAF0000T5E	0603	Populated as 0 Ω; replace to add attenuation
R2 (bottom)	10 kΩ	0603WAF1002T5E	0603	1%, always populated

Default State (Ground Jumper Installed)¶

The 1206 0 Ω ground jumper is placed before the voltage divider, between the connector pin and the divider network. When installed, AIN3 is held to GND and the channel functions as an extra ground at the connector. Remove this jumper to use Channel 3 as an analog input.

Active State (Ground Jumper Removed)¶

With the 0 Ω in R1 and 10 kΩ in R2, the circuit presents no voltage division. The analog source connects between 3.3 V and the measurement node; the 10 kΩ to GND acts as a pull-down or load.

Circuit topology:

3.3 V ── Sensor ──●── 10 kΩ ── GND
                  │
            TLV9154 IN+ (via 4.7 kΩ)

Thermistor Implementation (Murata NXFT15XH103FA2B050)¶

R25 = 10 kΩ ±1% (datasheet F tolerance code)
β25/50 = 3380 K ±1%
Operating range: −40 °C to +125 °C
Transfer function: V_node = 3.3 × (10k / (10k + R_NTC(T)))

The firmware default for the Beta constant must match the installed part. For NXFT15XH103FA2B050, set the Thermistor Beta value (Settings → Temperature Settings) to 3380. A mismatched Beta gives a temperature that is correct at 25 °C and increasingly wrong away from it — and the error grows in the dangerous direction at high temperatures (firmware under-reads, so high-temperature alarms fire late).

Temp (°C)	R_NTC (Ω)	V_node (V)
−40	235,831	0.134
0	28,224	0.863
25	10,000	1.650
50	4,160	2.330
75	1,963	2.759
100	1,024	2.993
125	580	3.119

Note: voltage crowds the upper rail above ~90–100 °C, which is the most relevant range for alternator temperature monitoring. Resolution collapses at high temperature and ADC headroom becomes limited.

Accuracy and Resolution (NXFT15XH103FA2B050)¶

The numbers below assume Beta = 3380, R0 = 10 kΩ, T0 = 25 °C are correctly entered in the firmware and the 10 kΩ pulldown is the populated ±1% 0603 part.

Temp (°C)	dV/dT at V_node (mV/°C)	ADC quantization (°C/LSB)*	Dominant error contribution	Expected total accuracy
−40	~9.5	~0.020	β tolerance, R0 tolerance	±2–3 °C
0	~21	~0.009	β tolerance, R0 tolerance, R_fixed tolerance	±1.5–2 °C
25	~31	~0.006	R0 tolerance and R_fixed tolerance only (β drops out at T0)	±1 °C
50	~30	~0.006	β tolerance, R0 tolerance, R_fixed tolerance	±1.5–2 °C
75	~22	~0.009	β tolerance growing	±2 °C
100	~12	~0.016	β tolerance dominant; voltage approaching rail	±2–3 °C
125	~5	~0.04	β tolerance dominant; very limited ADC headroom	±3–5 °C

* ADC quantization uses the ADS1115's 16-bit conversion at ±6.144 V FSR (0.1875 mV per LSB). Quantization is never the limiting factor for this channel — sensor tolerance is.

Usable temperature range:

Full sensor range: −40 °C to +125 °C (−40 °F to +257 °F). The Murata datasheet limits.
Practical range with good accuracy (±2 °C or better): roughly −20 °C to +110 °C. At the cold end, dV/dT is high and ADC margin is excellent. At the warm end the voltage is approaching the 3.3 V rail and dV/dT drops fast.
Hard upper edge: at +125 °C, V_node = 3.119 V — still 180 mV below the ADC rail, so the channel still produces a valid reading. Beyond about +135 °C the divider output rails out and the firmware will return its −99 invalid-reading sentinel.
Disconnect detection threshold: V_node < 0.05 V is treated as "no sensor" by the firmware. The lowest legitimate V_node (sensor at −40 °C) is 0.134 V, so the floor cleanly distinguishes a missing thermistor from a real cold reading.

Self-heating: at 25 °C the thermistor dissipates P = V_NTC² / R_NTC = (1.65 V)² / 10 kΩ = 0.27 mW. With a typical chip-NTC dissipation constant near 1 mW/°C, self-heating bias is well under 0.5 °C across the full range.

If you substitute a different 10 kΩ NTC: the part numbers and β values vary widely across vendors (3380, 3435, 3470, 3892, 3950, 4050, 4250 K are all common in 10 kΩ NTCs). The firmware lets you override Thermistor Beta, Thermistor Series Resistor R_fixed, and Thermistor Reference Temp T0 from the web UI — change Beta to match whatever part is actually installed.

Alternative Sensor: TMP235A4DCKR¶

The TMP235 can be connected at the same node with no PCB changes. Its output is a low-impedance analog voltage; the 10 kΩ to GND acts purely as a load.

Output slope: 10 mV/°C
Output offset: 0.500 V @ 0 °C
Range: well-centered in ADC operating range across −40 °C to +140 °C

Temp (°C)	V_node (V)
−40	0.100
0	0.500
25	0.750
100	1.500
125	1.750
140	1.900

The TMP235 avoids the compression and upper-rail crowding seen with the thermistor at high temperatures.

Protection and Stability¶

The following components are present on every channel:

4.7 kΩ series resistors on each TLV9154 non-inverting input — fault-current limiting
330 Ω series resistors on each TLV9154 output, placed outside the feedback loop — op-amp stability and ADC input protection
0.33 µF capacitors from each ADS1115 input node to ground — RC anti-aliasing filter
0.1 µF local decoupling capacitor directly across TLV9154 V+ and V−

Fault current with 4.7 kΩ protection (5 V source, op-amp unpowered): - (5 V − 0.3 V) / 4.7 kΩ = 1.0 mA → Safe

Fault current limiting on TLV9154 output (ADS1115 unpowered): - (3.3 V − 0.3 V) / 330 Ω = 9.1 mA → Within ADS1115 ±10 mA spec

TLV9154 Op-Amp Failure Analysis (Historical Reference)¶

Failure Description¶

Two TLV9154 op-amps failed with similar symptoms in an earlier PCB revision. One showed visible burn damage at the ground pin (Pin 11). The second showed no visible damage but produced garbage ADC readings. One failure occurred with the engine off and no input signals active.

Root Cause Analysis¶

Theory 1: Power Sequencing¶

The original design connected 5 V signals directly to op-amp inputs on channels powered from 3.3 V, with no input protection resistors. During power-up, the 5 V rail established before the 3.3 V rail. With supply pins at 0 V, input signals forward-biased the internal ESD protection diodes, driving current through them above their continuous rating. The ground pin (Pin 11) was the current exit point, explaining the burn damage pattern.

Channel 2 (LM2907, 0–5 V) and Channel 3 (thermistor with 5 V pullup) were the affected nodes.

Fault current without protection: - Channel 2: 5 V directly to Pin 10, limited only by LM2907 output impedance - Channel 3: 5 V through 10 kΩ = 0.5 mA potential clamp current

Both exceed continuous ESD diode ratings.

With the 4.7 kΩ protection resistors now in place: - Op-amp powered (3.3 V): (5 − 3.3 − 0.3) / 4.7k = 0.3 mA — Safe - Op-amp unpowered (0 V): (5 − 0.3) / 4.7k = 1.0 mA — Safe

Theory 2: Grounding Architecture¶

The original design connected ADS1115 AGND to battery negative through the INA228 Shunt− terminal via a Cat6 wire strand. The TLV9154 was grounded to the main PCB ground plane. This created different ground references for the two ICs.

The INA228 Shunt± terminals are Kelvin sensing inputs — they are designed to carry no return current from other circuits. Using Shunt− as a ground reference for the ADS1115 violates this principle. During transient fault conditions, instantaneous return currents through this high-impedance path created a ground delta between the TLV9154 and ADS1115, potentially contributing to thermal damage.

Grounding fix applied: ADS1115 AGND connected to the main PCB ground plane, shared with the TLV9154. INA228 Shunt± used only for Kelvin voltage sensing.

Conclusion¶

Both failure modes are addressed in the current design by the 4.7 kΩ input protection resistors and the corrected grounding architecture. Two similar failures on two separate units indicate a systematic design issue, not random component failure.

LM2907 RPM Measurement Chain — Ripple vs. Lag

This section covers the LM2907 output-side response delay and ripple, not the input-side stator conditioning network. The input-side network at pin 1 is a separate issue and mainly matters for dropout recovery after field collapse. The question here is: when stator frequency suddenly increases, how much lag does the LM2907-to-ADS1115 chain introduce, what causes it, and how much can it be improved?

Actual Hardware Configuration Used

The RPM channel uses the LM2907 frequency-to-voltage converter, then a TLV9154 buffer, then the ADS1115. The relevant component values are:

At the LM2907:

VCC = 5 V C1 = 10 nF on pin 2 R1 = 25 kΩ on pin 3 C2 = 1 µF on pin 3 in the current populated build no post-LM2907 voltage divider

At the ADC front end:

TLV9154 unity-gain buffer 330 Ω series resistor from op-amp output to ADS1115 input 0.33 µF from ADS1115 input to ground

The existing analog-input documentation currently describes pin 2 as 10 nF and pin 3 as 25 kΩ with three 1 µF capacitors originally intended, for a total of 3 µF. The current build differs only in that two of those 1 µF capacitors are DNP, so the actual populated C2 is 1 µF. The same doc also defines the ADS1115-side RC as 330 Ω and 0.33 µF, with a 109 µs time constant.

The ADS timing in the control code is also relevant. The sequence is {1,0,1,2,1,3} with about 2.35 ms/step, so CH2 (RPM) is sampled once per 6-step cycle, or about every 14 ms on average.

Definitions

Lag here means the time between a real increase in stator frequency and the time when the software-visible RPM value has moved substantially toward the new value.

Ripple here means the residual periodic voltage variation at LM2907 pin 3 caused by the charge pump delivering current in pulses each input cycle. If smoothing is reduced, the average voltage responds faster but the output shows more small ripple. In RPM units, that ripple appears as extra sample-to-sample jitter even when true speed is constant.

Governing Equations

The LM2907 average output voltage is:

Vout = VCC * fIN * C1 * R1

With the present values:

Vout = 5 * fIN * 10e-9 * 25e3

Vout = 0.00125 * fIN

So the LM2907 gain is:

0.00125 V/Hz = 1.25 mV/Hz

or equivalently:

fIN = 800 * Vout

You are using an empirical software conversion of:

RPM = 1330 * Vout

So one volt at the ADC corresponds to 1330 RPM, and one hertz of stator frequency corresponds to:

RPM/Hz = 1330 * 0.00125 = 1.6625 RPM/Hz

That means the present overall calibration is:

RPM = 1.6625 * fIN

and

fIN = 0.6015 * RPM

This is an empirical engine-RPM calibration, not a pure LM2907 property.

The LM2907 output ripple equation from the datasheet is:

Vripple_pk-pk = (VCC/2) * (C1/C2) * (1 - (VCC * fIN * C1 / I2))

which is commonly rewritten as:

Vripple_pk-pk = (VCC/2) * (C1/C2) * (1 - fIN/fMAX)

where:

fMAX = I2 / (C1 * VCC)

Using the datasheet’s I2 = 180 µA, and the present C1 = 10 nF, VCC = 5 V:

fMAX = 180e-6 / (10e-9 * 5) = 3600 Hz

So with the current C2 = 1 µF:

Vripple_pk-pk = 25 mV * (1 - fIN/3600)

The LM2907 output smoothing time constant is approximately:

τLM2907 = R1 * C2

So with the present values:

τLM2907 = 25 kΩ * 1 µF = 25 ms

For a first-order response:

63% of the step is reached in 1τ 90% in 2.3τ 95% in 3τ 99% in 4.6τ

The ADS1115-side RC is:

τADS = 330 Ω * 0.33 µF = 109 µs

So the ADC-side RC is tiny compared with the LM2907 output smoothing.

What Components Actually Affect Lag

For normal RPM increases, three things matter.

The first and dominant analog lag term is LM2907 pin-3 capacitor C2. Larger C2 gives lower ripple and slower response. Smaller C2 gives higher ripple and faster response.

The second term is RPM sample timing in the ADS1115 scan. CH2 is only updated about once every 30 ms, so even if the LM2907 output moved instantly, software still sees it only on the next RPM sample.

The third term is the tiny 330 Ω / 0.33 µF ADS input RC, but at 109 µs it is negligible here.

The input-side pin-1 network with 20 µF, 100 kΩ, and 6.8 nF is a separate issue. It creates the long multi-second recovery after field cutout, but it is not the dominant source of lag for ordinary RPM increases while the machine is running normally.

Present Baseline: 1 µF on Pin 3

With C2 = 1 µF:

τLM2907 = 25 ms

Response milestones are:

63% in 25 ms 90% in 57.5 ms 95% in 75 ms 99% in 115 ms

Theoretical LM2907 output ripple is:

Vripple_pk-pk = 25 mV * (1 - fIN/3600)

Converted into engine RPM using 1330 RPM/V:

RPMripple_pk-pk = 33.25 RPM * (1 - fIN/3600)

Examples for the present 1 µF case are:

fIN Vout Vripple_pk-pk RPMripple_pk-pk 600 Hz 0.750 V 20.8 mV 27.7 RPM 1000 Hz 1.250 V 18.1 mV 24.1 RPM 1500 Hz 1.875 V 14.6 mV 19.4 RPM 2000 Hz 2.500 V 11.1 mV 14.8 RPM

Important: that is the ideal raw LM2907 pin-3 ripple, not guaranteed final software jitter. Actual logged RPM jitter can be smaller or larger depending on sample phase, real engine torsional variation, and any further averaging.

Clean Improvement Options

The clean way to shorten RPM measurement lag is to reduce C2 on pin 3. That directly reduces τLM2907 and therefore shortens the analog response delay. It also increases ripple in inverse proportion.

Here are practical options:

Option A: C2 = 0.47 µF

τ = 25 kΩ * 0.47 µF = 11.75 ms

Response:

63% in 11.8 ms 90% in 27.0 ms 95% in 35.3 ms 99% in 54.1 ms

Ripple becomes:

Vripple_pk-pk = 53.2 mV * (1 - fIN/3600)

and

RPMripple_pk-pk = 70.8 RPM * (1 - fIN/3600)

Examples:

fIN Vout Vripple_pk-pk RPMripple_pk-pk 600 Hz 0.750 V 44.3 mV 58.9 RPM 1000 Hz 1.250 V 38.4 mV 51.1 RPM 1500 Hz 1.875 V 31.0 mV 41.2 RPM 2000 Hz 2.500 V 23.6 mV 31.4 RPM Option B: C2 = 0.22 µF

τ = 25 kΩ * 0.22 µF = 5.5 ms

Response:

63% in 5.5 ms 90% in 12.7 ms 95% in 16.5 ms 99% in 25.3 ms

Ripple becomes:

Vripple_pk-pk = 113.6 mV * (1 - fIN/3600)

and

RPMripple_pk-pk = 151.1 RPM * (1 - fIN/3600)

Examples:

fIN Vout Vripple_pk-pk RPMripple_pk-pk 600 Hz 0.750 V 94.7 mV 125.9 RPM 1000 Hz 1.250 V 82.2 mV 109.3 RPM 1500 Hz 1.875 V 66.3 mV 88.2 RPM 2000 Hz 2.500 V 50.5 mV 67.2 RPM Option C: C2 = 0.10 µF

τ = 25 kΩ * 0.10 µF = 2.5 ms

Response:

63% in 2.5 ms 90% in 5.8 ms 95% in 7.5 ms 99% in 11.5 ms

Ripple becomes:

Vripple_pk-pk = 250 mV * (1 - fIN/3600)

and

RPMripple_pk-pk = 332.5 RPM * (1 - fIN/3600)

Examples:

fIN Vout Vripple_pk-pk RPMripple_pk-pk 600 Hz 0.750 V 208 mV 277 RPM 1000 Hz 1.250 V 181 mV 241 RPM 1500 Hz 1.875 V 146 mV 194 RPM 2000 Hz 2.500 V 111 mV 148 RPM Comparison Against the Real Overshoot Problem

The real control issue being debugged is much faster than a leisurely thermal or state-machine event. The control code notes that the fast-OV path triggered about 90 ms earlier than the old raw-voltage threshold, and the key event unfolds over roughly 100–200 ms, not seconds. The control loop also samples RPM only once every ~14 ms because CH2 appears once per ADS scan cycle.

That means the current 1 µF RPM chain has two important time scales:

The analog LM2907 smoothing contributes about:

25 ms to move most of the way initially about 58 ms to reach 90% about 75 ms to reach 95%

Then the ADS scan adds:

0 to 14 ms of phase delay before the next CH2 sample sees that new voltage

So a realistic software-visible RPM response delay with the present hardware is roughly:

best case: around 25–30 ms typical: around 40–60 ms worst case: around 75–90 ms for near-full settling plus sample timing

That is now in the same rough ballpark as the control problem itself. So the present RPM measurement chain is not absurdly slow, but it is also not negligible.

With 0.47 µF, the analog part drops to about 27 ms for 90% settling, so total software-visible lag becomes more like:

best case: around 12–18 ms typical: around 18–34 ms worst case: around 40–65 ms

With 0.22 µF, analog settling to 90% is only about 13 ms, so then the dominant term becomes the ADS scan cadence. Total visible lag becomes roughly:

best case: around 6–10 ms typical: around 10–20 ms worst case: around 25–35 ms

That sounds attractive until the ripple numbers are looked at. At 0.22 µF, the theoretical raw LM2907 ripple becomes large enough that the RPM value may become noticeably jittery even if the engine is steady.

Engineering Interpretation

The present 1 µF choice is conservative. It gives modest analog lag and low ripple. If the observed steady-state RPM values are already only moving by about 5 RPM sample-to-sample in normal running, that suggests the current chain is reasonably clean.

Reducing C2 is the cleanest hardware way to improve RPM response time. However:

going from 1 µF to 0.47 µF roughly halves the analog lag while only doubling ripple going from 1 µF to 0.22 µF cuts analog lag by about 4.5× but also multiplies ripple by about 4.5× once C2 gets small enough, the ADS scan timing becomes the dominant delay anyway

So the best practical hardware tweak is probably:

Try 0.47 µF on LM2907 pin 3 first.

That meaningfully improves analog response time while staying far short of the ugly ripple/jitter increase predicted for 0.22 µF or 0.10 µF.

Bottom Line

The RPM-chain lag during a rapid throttle blip is dominated by two things:

LM2907 output smoothing on pin 3: currently 25 ms time constant from 25 kΩ * 1 µF ADS1115 CH2 update cadence: about 14 ms between RPM samples

The current hardware therefore likely contributes on the order of 40–60 ms of typical software-visible RPM lag, with a worst-case around 90 ms depending on sample phase.

The clean hardware lever is reduce LM2907 pin-3 C2. The most reasonable next step is 0.47 µF. That should roughly cut the analog portion of the delay in half while keeping ripple in a range that may still be acceptable. Going smaller than that is likely to trade too much smoothness for speed unless the RPM channel is moved to a digital pulse-counting architecture.