Alternator Field Control¶

Overview¶

This circuit provides PWM control of marine alternator field current up to 15A. The design supports both P-type (high-drive) and N-type (low-drive) alternators through external jumper configuration. The power stage uses a single N-channel MOSFET driven by a floating high-side driver with bootstrap supply.

Node VIN_2-60 is supplied from the protected output of the TPS48000-Q1 power entry stage, which provides reverse polarity protection, overvoltage protection, and overcurrent protection for the board. See the separate TPS48000 power entry documentation for that stage.

Key Specifications: - Logic/Boost Supply: 5V - Field Supply: VIN_2-60 (2–60V, from TPS48000 protected output) - Maximum Field Current: 15A - PWM Frequency: 1200Hz nominal - PWM Frequency Range: 100Hz–20kHz+ (thermally limited) - Supported Alternator Types: P-type (high-drive) and N-type (low-drive) - Control Input: 3.3V PWM from ESP32 microcontroller

Test Results (single MOSFET configuration): - Bank Nominal Voltage: 12V - Date: 9/10/25 - Enclosure: None - Ambient Temp: 63F - PWM Frequency: 1200Hz - PWM Duty Cycle: 100% - Battery Voltage: 12.93V - Field Voltage: 12.83V - Field Current (engine off): 4.2A - Maximum PCB Temp: ~30C (most residual from soldering) - Conclusion: No thermal issues expected. V3 issues were caused by high MOSFET Rds(on) from insufficient Vgs.

Key Net Names¶

Net Name	Description
VIN_2-60	Protected battery positive — output of TPS48000 stage
FIELD_FOR_N_TYPE	Q3 drain — field output terminal in N-type mode
FIELD_FOR_P_TYPE	Q3 source — field output terminal in P-type mode; also HS reference for gate driver
GND	Board ground

Jumper Configurations¶

P-type Alternator / High Drive¶

Jumper VIN_2-60 to FIELD_FOR_N_TYPE (Q3 drain).

The alternator field wiring connects between FIELD_FOR_P_TYPE (Q3 source) and the alternator's internally grounded brush. The far side of the field winding is tied to GND inside the alternator.

Current path (Q3 ON): VIN_2-60 → jumper → FIELD_FOR_N_TYPE (Q3 drain) → Q3 → FIELD_FOR_P_TYPE (Q3 source) → field winding → alternator internal GND → GND

Active flyback diode: D5 (anode=GND, cathode=FIELD_FOR_P_TYPE) When Q3 turns off, FIELD_FOR_P_TYPE falls below GND. D5 conducts, freewheeling field current through the winding.

N-type Alternator / Low Drive¶

Jumper FIELD_FOR_P_TYPE (Q3 source) to GND.

The alternator field wiring connects between FIELD_FOR_N_TYPE (Q3 drain) and the alternator's internally B+-connected brush. The far side of the field winding is tied to battery positive inside the alternator.

Current path (Q3 ON): B+ (alternator internal) → field winding → FIELD_FOR_N_TYPE (Q3 drain) → Q3 → FIELD_FOR_P_TYPE (Q3 source) → jumper → GND

Note: VIN_2-60 is NOT in the normal field current path in N-type mode. The B+ supply to the field comes from the alternator's own internal brush connection, not through the board.

Active flyback diode: D8 (anode=FIELD_FOR_N_TYPE, cathode=VIN_2-60) When Q3 turns off, FIELD_FOR_N_TYPE rises above VIN_2-60. D8 conducts, freewheeling field current back through the battery and alternator.

N-type installations require the external VIN_2-60 clamp module described in Appendix A. See also the N-type fuse requirement in the FAQ.

Circuit Architecture¶

Block 1: Level Shifter and System Enable Logic (3.3V → 5V)¶

Purpose: Translate ESP32 3.3V FIELD_ENABLE signal to 5V logic for boost converter control while providing multiple system disable conditions.

IC: U15 - SN74LVC1T45DBV Single-Bit Dual-Supply Bus Transceiver - VCCA (Pin 1): 5V supply for A-side - VCCB (Pin 6): 3V3 supply for B-side - B (Pin 4): Combined input from three control signals - A (Pin 3): Output to MT3608 Enable pin (5V logic) - DIR (Pin 5): Direction control — tied to GND (Pin 2) - GND (Pin 2): Ground

System Enable/Disable Logic:

The system uses a wired-AND configuration at U15 Pin 4 combining three control signals:

FIELD_ENABLE (ESP32 GPIO): Active-HIGH enable
3.3V from ESP32 through 10kΩ series resistor
When LOW or ESP32 unpowered: disables entire system
ALERT! (INA228 Alert Pin): Active-LOW disable
Open-drain output from battery current monitor IC
INA228 monitors battery rail current, not field current
Pulls low on overcurrent or fault condition
ON/OFF (Manual Toggle Switch): Active-LOW disable
Shorts pin to GND when in OFF position

Logic Function: - ENABLED when: FIELD_ENABLE = HIGH AND ALERT! = open AND ON/OFF = open - DISABLED when: FIELD_ENABLE = LOW OR ALERT! = active OR ON/OFF = closed

Enable Signal Path: FIELD_ENABLE / ALERT! / ON/OFF → U15 Pin 4 → U15 Pin 3 (5V) → U21 Pin 4 (EN) → MT3608 → 12V for LM5109A

Block 2: Boost Converter (5V → 12V)¶

Purpose: Generate 12V supply for gate driver from 5V logic input.

IC: U21 - MT3608 (SOT-23-6) - VIN (Pin 5): 5V via C42 (22µF) - VOUT: 12.07V - EN (Pin 4): From U15 Pin 3 - fSW: ~1.2MHz

Key Components: - L4: Shun Xiang Nuo SMNR4020-22UH (22µH) - D2: 1N5819WS (C191023) — 40V/1A Schottky boost rectifier, SOD-323 - C43, C63: 22µF each (44µF total), ≥25V

Feedback Network: - R94: 10kΩ (VOUT to FB) - R95: 523Ω (FB to GND) - Setpoint: V_OUT = 0.6V × (1 + 10000/523) = 12.07V

Block 3: High-Side MOSFET Driver¶

Purpose: Floating high-side gate drive for field current switching.

IC: U22 - LM5109AMA (SOIC-8) - Pin 1 (VDD): 12.07V from boost converter - Pin 2 (HI): PWM input via R89 (100Ω series), R54 (10kΩ pull-down) - Pin 3 (LI): Tied to GND per datasheet requirement - Pin 4 (VSS): Ground - Pin 5 (LO): Not connected - Pin 6 (HS): Connected to FIELD_FOR_P_TYPE (Q3 source) — floating reference, valid in both configurations - Pin 7 (HO): Gate drive output → R96 (10Ω) → Q3 gate - Pin 8 (HB): Bootstrap supply input

Bootstrap Circuit: - D7: US1M (C412437) — 1A fast recovery, SMA. Higher Vf than ideal; first component to revisit if gate drive margin degrades. - C4: 0.1µF, 100V - Bootstrap droop per cycle: ΔV ≈ 29nC / 0.1µF ≈ 0.29V — acceptable

Note on HS reference: HS connects to FIELD_FOR_P_TYPE (Q3 source) in both configurations. In P-type mode this is the switching field output node. In N-type mode this node is jumpered to GND. Bootstrap reference is valid in both cases.

Block 4: Power MOSFET and Field Output Stage¶

MOSFET: Q3 - BSC072N08NS5ATMA1 - Package: SuperSO8 (TDSON-8, 5×6 mm) - Vds max: 80V - Rds(on): 7.2mΩ max @ Vgs=10V - Qg: 29nC max @ 10V - Id continuous: 74A (Tc) - Vgs max: ±20V - EAS (single pulse avalanche): 40mJ

This is the same device (BSC072N08NS5ATMA1) used for the back-to-back input protection MOSFETs in the TPS48000 power entry stage.

Conduction loss at 15A: P = I² × Rds(on) = 15² × 0.0072 ≈ 1.62W — acceptable with PCB thermal spreading.

Q3 Pin Connections: - Pin 1 (Gate): HO via R96 (10Ω); R_GS upper terminal - Pins D1–D5 (Drain): FIELD_FOR_N_TYPE - Pins S1–S3 (Source): FIELD_FOR_P_TYPE — also U22 Pin 6 (HS), D5 cathode, C4 negative, R_GS lower terminal

Gate-Source Pull-Down R_GS (10kΩ): Connected between Q3 gate (Pin 1) and Q3 source (FIELD_FOR_P_TYPE). - In P-type mode: holds gate at source potential when driver is high-impedance - In N-type mode: source is jumpered to GND, so R_GS holds gate unconditionally at GND. Vgs = 0, Q3 off. Effective in both modes regardless of driver or ESP32 state.

Flyback Diodes:

Designator	Part	Anode	Cathode	Active Configuration
D5	FSV20100V	GND	FIELD_FOR_P_TYPE (Q3 source)	P-type / High Drive
D8	FSV20100V	FIELD_FOR_N_TYPE (Q3 drain)	VIN_2-60	N-type / Low Drive

Both diodes are always fitted. The inactive diode in each configuration is reverse-biased and has no effect on operation.

VIN_2-60 Node Protection (on-board):

SS2H10-E3/52T (Vishay, SMB): anode=GND, cathode=VIN_2-60. Clamps negative transients on the VIN_2-60 rail.
Bulk capacitance: 4 × 4.7µF + 100nF ceramic to GND (~18.9µF total). Local energy storage and high-frequency bypassing. These capacitors are physically located at the VIN_2-60 node (~15mm from the input protection MOSFET stage) and are shared with the LMR36510 input buffer — they serve both the alternator field drive circuit and the downstream regulator input simultaneously. See input_protection.md for layout details and transient dV/dt analysis.

System Operation¶

Normal Operation¶

ESP32 FIELD_ENABLE (with ALERT! inactive and ON/OFF switch ON) enables MT3608 via U15
MT3608 generates 12.07V for LM5109A
ESP32 PWM drives LM5109A HI pin
LM5109A drives Q3 gate via R96
Q3 PWM-switches field current
D5 or D8 (per configuration) freewheels inductive energy at each Q3 turn-off

Field Current Paths¶

P-type, Q3 ON: VIN_2-60 → jumper → FIELD_FOR_N_TYPE → Q3 → FIELD_FOR_P_TYPE → field winding → alternator internal GND → GND

P-type, Q3 OFF (D8 freewheeling): GND → D5 → FIELD_FOR_P_TYPE → field winding → alternator internal GND → GND

N-type, Q3 ON: B+ (alternator internal) → field winding → FIELD_FOR_N_TYPE → Q3 → FIELD_FOR_P_TYPE → jumper → GND

N-type, Q3 OFF (D8 freewheeling): FIELD_FOR_N_TYPE → D8 → VIN_2-60 → battery → alternator internal B+ → field winding → FIELD_FOR_N_TYPE

Bill of Materials¶

Active Components¶

Designator	Part Number	Description	Package	Rating
U15	SN74LVC1T45DBV	Bus transceiver / level shifter	SOT-23-6	5.5V, 32mA
U21	MT3608	Boost converter	SOT-23-6	2A, 24V
U22	LM5109AMA	High-side MOSFET driver	SOIC-8	100V, 2A
Q3	BSC072N08NS5ATMA1	N-channel MOSFET	SuperSO8	80V, 74A, 7.2mΩ

Passive Components¶

Designator	Value	Rating	Package	Function
L4	22µH	—	SMNR4020	Boost inductor
C42	22µF	25V	0805	Boost input filter
C43	22µF	25V	0805	Boost output filter
C63	22µF	25V	0805	Boost output filter
C4	0.1µF	100V	0805	Bootstrap capacitor
C11	1µF	—	0603	Level shifter supply filter
R94	10kΩ	1%	0603	Feedback divider upper
R95	523Ω	—	0603	Feedback divider lower
R96	10Ω	—	0603	Gate drive series resistor
R89	100Ω	—	0603	PWM input series resistor
R54	10kΩ	—	0603	PWM input pull-down
R_GS	10kΩ	—	0603	Gate-source pull-down

Diodes¶

Designator	Part	Package	Rating	Function
D2	1N5819WS (C191023)	SOD-323	40V, 1A	Boost rectifier
D7	US1M (C412437)	SMA	1000V, 1A	Bootstrap charging diode
D5	FSV20100V	—	100V, 20A	P-type flyback (anode=GND, cathode=FIELD_FOR_P_TYPE)
D8	FSV20100V	—	100V, 20A	N-type flyback (anode=FIELD_FOR_N_TYPE, cathode=VIN_2-60)
SS2H10	SS2H10-E3/52T	SMB	100V, 2A	VIN_2-60 negative transient clamp

Net Connections¶

Power Rails¶

3V3: U15 Pin 6 (VCCB), C11+

5V: U15 Pin 1 (VCCA), U21 Pin 5 (VIN), C42+

12.07V Boost: D2 cathode, C43+, C63+, U22 Pin 1 (VDD), D7 anode, R94 top

VIN_2-60: TPS48000 protected output; D8 cathode; SS2H10 cathode; bulk capacitor positive terminals; external clamp module (N-type installations only)

FIELD_FOR_N_TYPE: Q3 Pins D1–D5; D8 anode; field wiring terminal (N-type) or jumper to VIN_2-60 (P-type)

FIELD_FOR_P_TYPE: Q3 Pins S1–S3; U22 Pin 6 (HS); D5 cathode; C4−; R_GS lower terminal; field wiring terminal (P-type) or jumper to GND (N-type)

GND: U15 Pin 2, U21 Pin 2, U22 Pins 3+4, C42−, C43−, C63−, C11−, R95, R54, D5 anode, SS2H10 anode, bulk capacitor negative terminals; external clamp module GND (N-type installations only)

Signal Connections¶

FIELD_ENABLE: ESP32 GPIO → 10kΩ → U15 Pin 4

ALERT!: INA228 alert → U15 Pin 4 (open drain, pulls low on battery rail fault)

ON/OFF: Manual switch → U15 Pin 4 (shorts to GND when OFF)

OUT_PWM: ESP32 → R89 → U22 Pin 2 (HI); R54 pull-down to GND

Bootstrap¶

D7 anode → 12.07V rail
D7 cathode → C4+, U22 Pin 8 (HB)
C4− → FIELD_FOR_P_TYPE (Q3 source, U22 Pin 6 HS)
U22 Pin 7 (HO) → R96 → Q3 gate

Feedback¶

R94 top → 12.07V rail
R94 bottom → R95 top → U21 Pin 3 (FB)
R95 bottom → GND

Physical Layout Considerations¶

High Current Paths¶

VIN_2-60 to FIELD_FOR_N_TYPE: wide traces, heavy copper
FIELD_FOR_N_TYPE through Q3 to FIELD_FOR_P_TYPE: wide traces, heavy copper
GND: solid ground plane

Switching Node (FIELD_FOR_P_TYPE — High dV/dt)¶

Keep C4 and D7 tight to U22
Minimize HB–HS loop area
Route away from logic signals

Flyback Diodes¶

D5: place close to FIELD_FOR_P_TYPE and GND
D8: place close to FIELD_FOR_N_TYPE and VIN_2-60
Both carry fast dI/dt at Q3 turn-off; minimize lead inductance

Gate Drive¶

R96 and R_GS: place directly at Q3 gate and source pads
U22 to Q3 gate: short, controlled impedance

FAQ¶

Q: Does the TPS48000 protect against field overcurrent in N-type mode?

No. In N-type mode, field current flows from the alternator's own internal B+ brush connection, through the field winding, through Q3 to GND. This path bypasses the TPS48000 shunt entirely. The TPS48000 continues to protect board electronics but does not see field current in N-type mode.

The field circuit in N-type mode must be protected by an appropriately rated external fuse on the field wiring. Without this fuse the field wiring and alternator field winding are unprotected against a fault. The fuse also limits maximum field current, which directly limits worst-case stored inductive energy in the fault scenario described below.

Q: What happens if the TPS48000 trips while operating in N-type mode?

TPS48000 isolates VIN_2-60 from the raw battery. Board power is lost. Q3 gate is pulled to GND by R_GS (whose lower terminal is at GND via the N-type source jumper), turning Q3 off.

At the moment Q3 turns off, the alternator field winding has stored inductive energy (E = ½LI²). With typical alternator field inductance of 3–8H and field current up to 5A, this energy is in the range of 37–100J. The inductor maintains current flow, driving FIELD_FOR_N_TYPE (Q3 drain) above VIN_2-60. D8 conducts, pulling VIN_2-60 upward. Since VIN_2-60 is now isolated from the battery by the open TPS48000 pass FETs, the node rises. Q3 Vds (= FIELD_FOR_N_TYPE minus GND, since source is jumpered to GND) tracks VIN_2-60 directly.

VIN_2-60 must be prevented from exceeding 70V to protect other board components. This is the purpose of the external clamp module described in Appendix A.

The two most likely fault triggers are:

Overvoltage trip (lightning-induced or ESD transient): Fast, hard isolation of VIN_2-60. The clamp module activates and holds VIN_2-60 at 67V, providing a return path for field current: field → FIELD_FOR_N_TYPE → D8 → VIN_2-60 → clamp → GND → alternator internal B+ → field. Field energy then decays through winding resistance over the L/R time constant. The clamp MOSFET (not Q3) dissipates this energy.
Brownout / UVLO trip: VIN_2-60 sags gradually rather than disconnecting hard. Field current has more time to decay naturally through winding resistance during the sag. This is the less severe of the two scenarios and the clamp module may not activate at all if the sag is slow enough.

Q: Does R_GS protect against undefined or unpowered ESP32 states in N-type mode?

Yes. R_GS connects Q3 gate to Q3 source (FIELD_FOR_P_TYPE). In N-type mode, FIELD_FOR_P_TYPE is jumpered to GND. R_GS therefore holds the gate unconditionally at GND regardless of driver or ESP32 state. Vgs = 0, Q3 remains off. This works identically in both configurations and is robust in N-type mode because the source jumper to GND makes the pull-down absolute.

Appendix A: N-type Installation — External VIN_2-60 Clamp Module¶

This module is recommended for all N-type (low-drive) alternator installations- it prevents board damage if power is cut (ie someone unplugs the regulator) while actively charging (non-zero field output). It is not useful for P-type installations.

Purpose¶

When the TPS48000 trips with the field energized, the stored inductive energy of the alternator field winding drives VIN_2-60 above normal operating voltage. This module clamps VIN_2-60 to 67V, protecting board components rated for 70V maximum, and simultaneously provides a return path for field current so that energy decays safely through the field winding resistance rather than spiking destructively.

The module is self-powered from the rising VIN_2-60 node itself. It requires no external supply and operates correctly even when the board is completely unpowered.

Operating Principle¶

A TL431 precision shunt regulator monitors VIN_2-60 through a resistor divider. When VIN_2-60 exceeds 67V, the TL431 activates and turns on an external N-channel power MOSFET connected between VIN_2-60 and GND. The MOSFET conducts field current in linear mode, clamping VIN_2-60 at 67V. Field energy dissipates in the MOSFET and in the field winding resistance over the L/R decay time (typically 1–2 seconds). The module shuts off automatically when VIN_2-60 drops back below the trip threshold.

Under all normal operating conditions (VIN_2-60 ≤ 60V), the TL431 reference pin voltage remains below its 2.495V threshold. The MOSFET gate is held at GND. The module is completely inactive and draws only the resistor divider current (~0.6µA at 60V).

Schematic Description¶

VIN_2-60 ──┬──── R_CLK_TOP (100kΩ, 0.1%) ────┬──── R_CLK_BOT (3.83kΩ, 0.1%) ──── GND
           │                                   │
           │                              TL431 REF (Pin 1)
           │                              TL431 Cathode (Pin 3) ──── VIN_2-60
           │                              TL431 Anode (Pin 2) ──── R_GATE (100Ω) ──┬── Q_CLAMP Gate
           │                                                                         └── R_GATE_GND (10kΩ) ── GND
           │
           └──── Q_CLAMP Drain (TO-247)
                 Q_CLAMP Source ──── GND

TL431 cathode connects to VIN_2-60 (self-powered). When REF reaches 2.495V, TL431 pulls its anode toward GND through its internal shunt, which pulls the MOSFET gate high via the VIN_2-60 → TL431 cathode-to-anode path. R_GATE (100Ω) limits inrush current into Q_CLAMP Ciss at activation and damps any gate oscillation. R_GATE_GND holds the gate at GND when TL431 is inactive.

Trip Point Calculation¶

Vtrip = 2.495V × (R_CLK_TOP + R_CLK_BOT) / R_CLK_BOT
      = 2.495 × (100,000 + 3,830) / 3,830
      ≈ 67.6V

With 0.1% resistors and TL431 reference tolerance of ±0.5%, total trip point accuracy is approximately ±1V. Trip point range: 66.6V to 68.6V. This fits cleanly between the TPS48000 worst-case OVP maximum trip of 65.3V and the 70V board hard limit.

Normal Operation Verification¶

At 60V (maximum normal VIN_2-60):

V_REF = 60V × 3,830 / 103,830 = 2.21V

2.21V < 2.495V threshold. TL431 inactive. MOSFET off. ✓

At 65.3V (TPS48000 worst-case OVP trip point):

V_REF = 65.3V × 3,830 / 103,830 = 2.41V

2.41V < 2.495V threshold. Clamp still inactive. Does not interfere with TPS48000 OVP. ✓

MOSFET Dissipation¶

Worst case: field current = 5A (limited by external field fuse), clamp voltage = 67V.

Peak dissipation: 5A × 67V = 335W

Duration: approximately L/R. With L = 8H (worst case), R = 3Ω (minimum typical field winding resistance):

τ = L / R = 8 / 3 ≈ 2.7 seconds

Total energy: up to 100J in worst case.

The MOSFET must survive this in linear mode (not avalanche). A device with high voltage rating (which directly buys SOA headroom in linear mode) and a proper heatsink is required. A TO-247 device mounted to an aluminum heatsink is the correct approach.

Bill of Materials — Clamp Module¶

Designator	Primary Part	Alternatives	Description	Rating	Notes
Q_CLAMP	IRFP460	IPP60R040CFD7, IXFH20N60, STW20N60	N-channel power MOSFET	≥400V, ≥10A, TO-247 or TO-220F	High Vds rating chosen for linear-mode SOA headroom. IRFP460 preferred — cheap, widely available, proven TO-247 package. Any 400V–600V device with good linear-mode SOA at 5A/67V is acceptable. Avoid 100V–150V devices; the narrow SOA margin is the whole problem being solved here.
U_REF	TL431ACLP (TO-92)	TL431AIDBZR (SOT-23), TL431BCLP (tighter ±0.4% ref)	Precision shunt regulator	2.495V ref	±0.5% reference tolerance for A-grade. Use B-grade (TL431B) for tighter trip point if preferred.
R_CLK_TOP	100kΩ 0.1%	Vishay/Dale CMF or Susumu RR series	Voltage divider upper	0.1%
R_CLK_BOT	3.83kΩ 0.1%	Vishay/Dale CMF or Susumu RR series	Voltage divider lower	0.1%	3.83kΩ is a standard E96 value. Verify stock before ordering. Nearest alternatives: 3.74kΩ (trips at 66.1V) or 3.92kΩ (trips at 68.8V).
R_GATE	100Ω	68Ω–220Ω acceptable	Gate series resistor	5% acceptable	Limits inrush into Q_CLAMP Ciss at activation; damps gate oscillation
R_GATE_GND	10kΩ	4.7kΩ–22kΩ acceptable	Gate pull-down	5% acceptable	Holds MOSFET off when TL431 inactive
Heatsink	≥2°C/W	—	Finned aluminum	—	Sized for 335W peak, ~2.7s duration. A small bolt-on extrusion heatsink on a bulkhead mount is sufficient.

Physical Installation¶

Mount Q_CLAMP on heatsink using thermal pad and mounting hardware
Mount heatsink to engine room bulkhead or other metalwork for additional thermal mass
Wire two connections to the boat harness: VIN_2-60 and GND, at the board connector or nearby distribution point
TL431 and resistors can be mounted dead-bug style on the heatsink bracket or on a small PCB affixed to the bracket
This module is for N-type alternator installations only. Do not install on P-type systems.
Keep wiring to VIN_2-60 and GND short to minimize inductance in the clamp loop

Future Plans¶

Q3 MOSFET upgrade: Q3 (BSC072N08NS5ATMA1, 80V) is a candidate for upgrade to a 150V equivalent device, on the same timeline and for the same reasons as the input protection MOSFETs — primarily to provide transient headroom on 48V systems. The input protection MOSFETs and Q3 are the same device family, so a single qualified replacement covers both stages. See input_protection.md Future Plans for the specific candidate part.
Inrush / slew control for the protection stage: Proper gate slew rate control for the TPS48000 protection MOSFETs is planned (see input_protection.md Future Plans). This is a protection-stage change but affects the VIN_2-60 startup behavior that the alternator field drive circuit depends on.
D7 bootstrap diode: US1M has higher forward voltage than ideal. If gate drive margin is observed to degrade at high duty cycle or elevated temperature, revisit this diode first.